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STB50NE10
N - CHANNEL 100V - 0.021 - 50A - D2PAK STripFETTM POWER MOSFET
TYPE STB50NE10
s s s s s
V DSS 100 V
R DS(on) <0.027
ID 50 A
s
TYPICAL RDS(on) = 0.021 EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC APPLICATION ORIENTED CHARACTERIZATION FOR THROUGH-HOLE VERSION CONTACT SALES OFFICE
3 1
DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SOLENOID AND RELAY DRIVERS s MOTOR CONTROL, AUDIO AMPLIFIERS s DC-DC & DC-AC CONVERTERS s AUTOMOTIVE ENVIRONMENT ABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS ID ID I DM (*) P tot Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor dv/dt (1) Peak Diode Recovery voltage slope Ts tg Tj Storage Temperature Max. Operating Junction Temperature
o o o
D2PAK TO-263 (suffix "T4")
INTERNAL SCHEMATIC DIAGRAM
Value 100 100 20 50 35 200 150 1 6 -65 to 175 175
( 1) ISD 50 A, di/dt 300 A/s, VDD V(BR)DSS, Tj TJMAX
Un it V V V A A A W W /o C V/ns
o o
C C
(*) Pulse width limited by safe operating area
December 1998
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THERMAL DATA
R thj -case
Rthj -amb
R thc-sink Tl
Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose
1 62.5 0.5 300
C/W oC/W o C/W o C
o
AVALANCHE CHARACTERISTICS
Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) Max Value 50 300 Unit A mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 100 1 10 100 Typ. Max. Unit V A A nA
V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 20 V
T c = 125 oC
ON ()
Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10V Test Con ditions ID = 250 A ID = 25 A 50 Min. 2 Typ. 3 0.021 Max. 4 0.027 Unit V A
V DS > ID(o n) x R DS(on )ma x V GS = 10 V
DYNAMIC
Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D =25 A V GS = 0 Min. 20 Typ. 35 4350 500 175 6000 675 238 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 50 V I D = 25 A R G =4.7 V GS = 10 V (see test circuit, figure 3) V DD = 80 V I D = 50 A V GS = 10 V Min. Typ. 25 100 123 24 47 Max. 34 135 166 Unit ns ns nC nC nC
SWITCHING OFF
Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 80 V I D = 50 A R G =4.7 V GS = 10 V (see test circuit, figure 5) Min. Typ. 45 35 65 Max. 61 48 88 Unit ns ns ns
SOURCE DRAIN DIODE
Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 50 A V GS = 0 155 815 10.5 I SD = 50 A di/dt = 100 A/s o Tj = 150 C V DD = 30 V (see test circuit, figure 5) Test Con ditions Min. Typ. Max. 50 200 1.5 210 1100 15 Unit A A V ns nC A
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
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Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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STB50NE10
Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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STB50NE10
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STB50NE10
TO-263 (D2PAK) MECHANICAL DATA
mm MIN. A A1 B B2 C C2 D E G L L2 L3 4.3 2.49 0.7 1.25 0.45 1.21 8.95 10 4.88 15 1.27 1.4 TYP. MAX. 4.6 2.69 0.93 1.4 0.6 1.36 9.35 10.28 5.28 15.85 1.4 1.75 MIN. 0.169 0.098 0.027 0.049 0.017 0.047 0.352 0.393 0.192 0.590 0.050 0.055 inch TYP. MAX. 0.181 0.106 0.036 0.055 0.023 0.053 0.368 0.404 0.208 0.624 0.055 0.068
DIM.
E C2 L2
A
D L L3
B2 B G
A1 C
P011P6/C
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STB50NE10
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com .
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